Memory requirements can be a significant consideration in designing any data processing device or system. Such consideration is especially important in the design of system-on-chip (SOC) devices, which squeeze most if not all circuit functions on a single chip. One use of memory that consumes significant chip space in SOC imager devices which perform image processing operations is the storage of multiple lines of image data in on-chip line buffers, such that the lines of image data may be simultaneously accessed during some image processing operations. Thus, reduction in the size of on-chip line buffers is especially desirable for SOC imager devices.